Switch-mode power supply voltage regulator and methodology
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United States of America Patent
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Apr 3, 2007
Grant Date -
May 11, 2006
app pub date -
Nov 5, 2004
filing date -
Nov 5, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Pulse width modulation of the connection of a load output terminal to a power supply terminal is effected. In response to a first level of the pulse width modulated signal, the load is disconnected from the power supply terminal, steady-state load voltage is preserved on a capacitor connected between a load output terminal and a power supply terminal, and steady-state load current information is held on a capacitor within the feedback loop. In response to a second level of the pulse width modulated signal, the load is reconnected to the power supply terminal, and load voltage and current instantaneously resume at their correct steady-state values.
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