Termination arrangement for high speed data rate multi-drop data bit connections
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United States of America Patent
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Apr 17, 2007
Grant Date -
N/A
app pub date -
Aug 25, 2005
filing date -
Aug 26, 2004
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A circuit for terminating devices attached to a signal line and driving a load includes a resistor R1 in series with the signal line circuit CR1 having a resistor in series with a switch wherein CR1 is in parallel with R1, a circuit CR2 having a resistor in series with a switch, connected at one end to Vcc and at the other to the load, a circuit CR3 having a resistor in series with a switch, connected at one end to Vcc and at the other to the load, a circuit CR4 having a resistor in series with a switch, connected at one end to ground and at the other to the load, a circuit CR5 having a resistor in series with a switch, connected at one end to Vcc and at the other to the load, and a capacitor connected between the receiver or transmitter and ground.
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