US Patent No: 7,210,129

Number of patents in Portfolio can not be more than 2000

Method for translating programs for reconfigurable architectures

Stats

ALSO PUBLISHED AS: 20030056202
ATTORNEY / AGENT: (SPONSORED)
 

Importance

Loading Importance Indicators... loading....

Abstract

A method for translating high-level languages to reconfigurable architectures is disclosed. The method includes building a finite automaton for calculation. The method further includes forming a combinational network of a plurality of individual functions in accordance with the structure of the finite automaton. The method further includes allocating a plurality of memories to the network for storing a plurality of operands and a plurality of results.

Loading the Abstract Image... loading....

First Claim

Related Publications

Loading Related Publications... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
KRASS, MAREN, MS.ZURICH54
RICHTER, THOMAS, MR.ZURICH54
PACT INFORMATIONSTECHNOLOGIE AGMUNICH, DE2

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
May, Frank Zurich, CH 39 302
Nuckel, Armin Neupotz, DE 14 193
Vorbach, Martin Karlsruhe, DE 148 2032

Cited Art

Patent Info (Count) # Cites Year
 
INTEL CORPORATION (23)
4,910,665 Distributed processing system including reconfigurable elements 82 1986
5,023,775 Software programmable logic array utilizing "and" and "or" gates 104 1990
5,634,131 Method and apparatus for independently stopping and restarting functional units 116 1994
5,889,982 Method and apparatus for generating event handler vectors based on both operating mode and event type 65 1995
5,652,894 Method and apparatus for providing power saving modes to a pipelined processor 89 1995
6,389,579 Reconfigurable logic for table lookup 79 1999
6,243,808 Digital data bit order conversion using universal switch matrix comprising rows of bit swapping selector groups 80 1999
6,298,472 Behavioral silicon construct architecture and mapping 112 1999
6,347,346 Local memory unit system with global access for use on reconfigurable chips 111 1999
6,370,596 Logic flag registers for monitoring processing system events 78 1999
6,341,318 DMA data streaming 87 1999
6,288,566 Configuration state memory for functional blocks on a reconfigurable chip 82 1999
6,311,200 Reconfigurable program sum of products generator 78 1999
6,349,346 Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit 86 1999
6,519,674 Configuration bits layout 67 2000
6,539,477 System and method for control synthesis using a reachable states look-up table 78 2000
6,282,627 Integrated processor and programmable data path chip for reconfigurable computing 216 2000
6,392,912 Loading data plane on reconfigurable chip 78 2001
2002/0143,505 Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals 53 2001
2003/0056,091 Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations 51 2001
2003/0055,861 Multipler unit in reconfigurable chip 71 2001
2003/0052,711 Despreader/correlator unit for use in reconfigurable chip 51 2001
2002/0038,414 Address generator for local system memory in reconfigurable logic chip 50 2001
 
XILINX, INC. (21)
4,706,216 Configurable logic element 472 1985
4,870,302 Configurable electrical circuit having configurable logic elements and configurable interconnects 680 1988
RE34363 Configurable electrical circuit having configurable logic elements and configurable interconnects 543 1991
5,455,525 Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array 347 1993
5,430,687 Programmable logic device including a parallel input device for loading memory cells 182 1994
5,426,378 Programmable logic device which stores more than one configuration and means for switching configurations 387 1994
5,521,837 Timing driven method for laying out a user's circuit onto a programmable integrated circuit device 159 1995
5,491,353 Configurable cellular array 93 1995
5,583,450 Sequencer for a time multiplexed programmable logic device 136 1995
5,778,439 Programmable logic device with hierarchical confiquration and state storage 134 1995
6,023,564 Data processing system using a flash reconfigurable logic device as a dynamic execution unit for a sequence of instructions 56 1996
6,047,115 Method for configuring FPGA memory planes for virtual hardware computation 101 1997
6,011,407 Field programmable gate array with dedicated computer bus interface and method for configuring both 142 1997
5,892,961 Field programmable gate array having programming instructions in the configuration bitstream 186 1997
5,936,424 High speed bus with tree structure for selecting bus driver 87 1997
6,049,222 Configuring an FPGA using embedded memory 121 1997
6,172,520 FPGA system with user-programmable configuration ports and method for reconfiguring the FPGA 83 1999
6,105,105 Data processing system using configuration select logic, an instruction store, and sequencing logic during instruction execution 73 1999
6,263,430 Method of time multiplexing a programmable logic device 62 1999
6,421,817 System and method of computation in a programmable logic device using virtual instructions 83 2000
6,480,954 Method of time multiplexing a programmable logic device 201 2001
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (15)
4,566,102 Parallel-shift error reconfiguration 97 1983
5,347,639 Self-parallelizing computer system and method 90 1991
5,590,345 Advanced parallel array processor(APAP) 152 1992
5,590,348 Status predictor for combined shifter-rotate/merge unit 55 1992
5,794,059 N-dimensional modified hypercube 105 1994
5,513,366 Method and system for dynamically reconfiguring a register file in a vector processor 146 1994
5,475,856 Dynamic multi-mode parallel processing array 278 1994
5,483,620 Learning machine synapse processor system apparatus 73 1995
5,717,943 Advanced parallel array processor (APAP) 131 1995
5,713,037 Slide bus communication functions for SIMD/MIMD array processor 85 1995
5,754,871 Parallel processing system having asynchronous SIMD processing 87 1995
5,588,152 Advanced parallel processor including advanced support hardware 141 1995
5,617,547 Switch network extension of bus architecture 98 1996
5,734,921 Advanced parallel array processor computer package 100 1996
6,054,873 Interconnect structure between heterogeneous core regions in a programmable array 182 1999
 
ALTERA CORPORATION (11)
5,444,394 PLD with selective inputs from local and global conductors 123 1993
5,473,266 Programmable logic device having fast programmable logic array blocks and a central global interconnect array 99 1994
5,485,103 Programmable logic array with local and global conductors 167 1994
5,537,057 Programmable logic array device with grouped logic regions and three types of conductors 232 1995
5,570,040 Programmable logic array integrated circuit incorporating a first-in first-out memory 139 1995
5,541,530 Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks 135 1995
5,859,544 Dynamic configurable elements for programmable logic devices 101 1996
5,828,229 Programmable logic array integrated circuits 137 1997
6,085,317 Reconfigurable computer architecture using programmable logic devices 107 1997
6,216,223 Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor 57 1999
6,836,839 Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements 98 2001
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (9)
4,663,706 Multiprocessor multisystem communications network 152 1983
5,226,122 Programmable logic system for filtering commands to a microprocessor 100 1987
5,014,193 Dynamically configurable portable computer system 186 1988
5,203,005 Cell structure for linear array wafer scale integration architecture with capability to open boundary I/O bus without neighbor acknowledgement 58 1989
5,287,472 Memory system using linear array wafer scale integration architecture 86 1990
5,353,432 Interactive method for configuration of computer system and circuit boards with user specification of system resources and computer resolution of resource conflicts 90 1991
5,884,075 Conflict resolution using self-contained virtual devices 62 1997
6,125,408 Resource type prioritization in generating a device configuration 66 1997
6,782,445 Memory and instructions in computer architecture containing processor and coprocessor 50 2001
 
LATTICE SEMICONDUCTOR CORPORATION (9)
5,233,539 Programmable gate array with improved interconnect structure, input/output structure and configurable logic block 151 1989
5,015,884 Multiple array high performance programmable logic device family 119 1990
5,489,857 Flexible synchronous/asynchronous cell structure for a high density programmable logic device 86 1992
5,422,823 Programmable gate array device having cascaded means for function definition 124 1994
5,485,104 Logic allocator for a programmable logic device 79 1995
5,586,044 Array of configurable logic blocks including cascadable lookup tables 77 1995
5,559,450 Field programmable gate array with multi-port RAM 129 1995
5,587,921 Array of configurable logic blocks each including a look up table having inputs coupled to a first multiplexer and having outputs coupled to a second multiplexer 74 1995
6,034,538 Virtual logic system for reconfigurable hardware 113 1998
 
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (8)
5,596,742 Virtual interconnections for reconfigurable logic systems 176 1993
5,440,538 Communication system with redundant links and data bit time multiplexing 66 1993
5,742,180 Dynamically programmable gate array with multiple contexts 256 1995
6,052,773 DPGA-coupled microprocessors 163 1995
5,761,484 Virtual interconnections for reconfigurable logic systems 138 1995
5,956,518 Intermediate-grain reconfigurable processing device 158 1996
6,127,908 Microelectro-mechanical system actuator device and reconfigurable circuits utilizing same 157 1997
5,927,423 Reconfigurable footprint mechanism for omnidirectional vehicles 74 1998
 
RICHTER, THOMAS, MR. (8)
6,021,490 Run-time reconfiguration method for programmable units 77 1997
6,038,650 Method for the automatic address generation of modules within clusters comprised of a plurality of these modules 52 1997
6,081,903 Method of the self-synchronization of configurable elements of a programmable unit 75 1997
6,425,068 UNIT FOR PROCESSING NUMERIC AND LOGIC OPERATIONS FOR USE IN CENTRAL PROCESSING UNITS (CPUS), MULTIPROCESSOR SYSTEMS, DATA-FLOW PROCESSORS (DSPS), SYSTOLIC PROCESSORS AND FIELD PROGRAMMABLE GATE ARRAYS (EPGAS) 73 1997
6,405,299 Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity 75 1998
6,697,979 Method of repairing integrated circuits 85 2000
6,477,643 Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like) 126 2000
6,571,381 Method for deadlock-free configuration of dataflow processors and modules with a two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.) 71 2001
 
PACT XPP TECHNOLOGIES AG (7)
5,943,242 Dynamically reconfigurable data processing system 84 1995
6,088,795 Process for automatic dynamic reloading of data flow processors (DFPs) and units with two or three-dimensional programmable cell architectures (FPGAs, DPGAs and the like) 63 1997
6,119,181 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 79 1997
6,338,106 I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures 79 1999
6,542,998 Method of self-synchronization of configurable elements of a programmable module 69 1999
6,526,520 Method of self-synchronization of configurable elements of a programmable unit 50 2000
6,513,077 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 51 2001
 
ACTEL CORPORATION (4)
5,440,245 Logic module with configurable combinational and sequential blocks 87 1993
5,457,644 Field programmable digital signal processing array integrated circuit 123 1993
5,510,730 Reconfigurable programmable interconnect architecture 101 1995
5,600,265 Programmable interconnect architecture 98 1995
 
BROADCOM CORPORATION (4)
5,915,123 Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements 139 1997
6,108,760 Method and apparatus for position independent reconfiguration in a network of multiple context processing elements 75 1997
6,122,719 Method and apparatus for retiming in a network of multiple context processing elements 76 1997
6,457,116 Method and apparatus for controlling contexts of multiple context processing elements in a network of multiple context processing elements 131 1999
 
RICOH COMPANY, LTD. (4)
5,511,173 Programmable logic array and data processing unit using the same 93 1994
5,794,062 System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization 148 1995
5,854,918 Apparatus and method for self-timed algorithmic execution 90 1996
5,933,642 Compiling system and method for reconfigurable computing 112 1997
 
FUJITSU LIMITED (3)
5,506,998 Parallel data processing system using a plurality of processing elements to process data and a plurality of trays connected to some of the processing elements to store and transfer data 81 1994
5,544,336 Parallel data processing system which efficiently performs matrix and neurocomputer operations, in a negligible data transmission time 75 1995
5,655,069 Apparatus having a plurality of programmable logic processing units for self-repair 110 1996
 
NATIONAL SEMICONDUCTOR CORPORATION (3)
5,081,375 Method for operating a multiple page programmable logic device 85 1991
5,336,950 Configuration features in a configurable logic array 192 1993
5,784,636 Reconfigurable computer architecture for use in signal processing applications 203 1996
 
SAMSUNG ELECTRONICS CO., LTD. (3)
5,655,124 Selective power-down for high performance CPU/system 95 1995
5,732,209 Self-testing multi-processor die with internal compare points 116 1996
6,895,452 Tightly coupled and scalable memory and execution unit architecture 5 1998
 
TEXAS INSTRUMENTS INCORPORATED (3)
5,522,083 Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors 179 1994
5,532,957 Field reconfigurable logic/memory array 92 1995
6,279,077 Bus interface buffer control in a microprocessor 84 1997
 
ATMEL CORPORATION (2)
5,144,166 Programmable logic cell and array 323 1990
6,014,509 Field programmable gate array having access to orthogonal and diagonal adjacent neighboring cells 107 1997
 
CHAMELEON SEMICONDUCTOR (2)
5,966,534 Method for compiling high level programming languages into an integrated processor with reconfigurable logic 152 1997
5,970,254 Integrated processor and programmable data path chip for reconfigurable computing 192 1997
 
ECHELON CORPORATION (2)
5,113,498 Input/output section for an intelligent cell which provides sensing, bidirectional communications and control 112 1990
5,844,888 Network and intelligent cell for providing sensing, bidirectional communications and control 109 1995
 
FUJI XEROX CO., LTD. (2)
5,204,935 Programmable fuzzy logic circuits 77 1992
5,448,186 Field-programmable gate array 136 1994
 
GE FANUC AUTOMATION NORTH AMERICA, INC. (2)
5,109,503 Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters 90 1989
5,142,469 Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller 112 1990
 
GEO SEMICONDUCTOR INC. (2)
4,739,474 Geometric-arithmetic parallel processor 158 1983
5,421,019 Parallel data processor 91 1992
 
HITACHI, LTD. (2)
5,537,601 Programmable digital signal processor for performing a plurality of signal processings 188 1994
5,848,238 Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 58 1997
 
HUGHES AIRCRAFT COMPANY (2)
5,021,947 Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing 233 1990
5,379,444 Array of one-bit processors each having only one bit of memory 57 1994
 
MOTOROLA, INC. (2)
5,493,239 Circuit and method of configuring a field programmable gate array 128 1995
5,649,179 Dynamic instruction allocation for a SIMD processor 60 1995
 
NORMAN, RICHARD S. (2)
5,801,715 Massively-parallel processor array with outputs from individual processors directly to an external device without involving other processors or a common physical carrier 75 1994
5,748,872 Direct replacement cell fault tolerant architecture 183 1996
 
PACT INFORMATIONSTECHNOLOGIE GMBH (2)
6,480,937 Method for hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)-- 71 2001
6,687,788 Method of hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs , etc.) 51 2002
 
QUICKLOGIC CORPORATION (2)
5,773,994 Method and apparatus for implementing an internal tri-state bus within a programmable logic circuit 63 1995
5,892,370 Clock network for field programmable gate array 51 1997
 
ROUND ROCK RESEARCH, LLC (2)
5,247,689 Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments 102 1990
5,887,162 Memory device having circuitry for initializing and reprogramming a control operation feature 55 1997
 
TAROFISS DATA LIMITED LIABILITY COMPANY (2)
5,802,290 Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed 176 1996
6,289,440 Virtual computer of plural FPG's successively reconfigured in response to a succession of inputs 67 1999
 
UNIVERSITY OF WASHINGTON (2)
5,208,491 Field programmable gate array 345 1992
6,023,742 Reconfigurable computing architecture for providing pipelined data paths 193 1997
 
ADVANCED MICRO DEVICES, INC. (1)
5,625,806 Self configuring speed path in a microprocessor with multiple clock option 60 1996
 
ALLEN-BRADLEY COMPANY, INC. (1)
5,428,526 Programmable controller with time periodic communication 64 1993
 
ANALOGIC CORPORATION (1)
5,301,344 Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets 125 1991
 
BELL TELEPHONE LABORATORIES, INCORPORATED (1)
4,682,284 Queue administration method and apparatus 109 1984
 
BSC ACQUISTION, INC. (1)
6,260,179 Cell arrangement evaluating method, storage medium storing cell arrangement evaluating program, cell arranging apparatus and method, and storage medium storing cell arranging program 152 1998
 
CADENCE DESIGN SYSTEMS, INC. (1)
5,680,583 Method and apparatus for a trace buffer in an emulation system 67 1994
 
CAL. MEDIA, L.L.C. (1)
5,675,743 Multi-media server 65 1995
 
CALIFORNIA INSTITUTE OF TECHNOLOGY (1)
6,038,656 Pipelined completion for asynchronous communication 71 1998
 
CARLSTEDT ELEKTRONIK AB (1)
5,555,434 Computing device employing a reduction processor and implementing a declarative language 71 1994
 
COMTECH TELECOMMUNICATIONS CORP. (1)
5,532,693 Adaptive data compression system with systolic string matching logic 101 1994
 
COX COMMUNICATIONS, INC. (1)
5,867,723 Advanced massively parallel computer with a secondary storage device coupled through a secondary storage interface 72 1996
 
CVSI, INC. (1)
4,761,755 Data processing system and method having an improved arithmetic unit 90 1984
 
CYPRESS SEMICONDUCTOR CORPORATION (1)
6,538,468 Method and apparatus for multiple boot-up functionalities for a programmable logic device (PLD) 89 2000
 
DELL USA, L.P. (1)
5,530,946 Processor failure detection and recovery circuit in a dual processor computer system and method of operation thereof 99 1994
 
DEUTSCHE ITT INDUSTRIES GMBH (1)
5,410,723 Wavefront array processor for blocking the issuance of first handshake signal (req) by the presence of second handshake signal (ack) which indicates the readyness of the receiving cell 101 1993
 
E-SYSTEMS, INC. (1)
4,967,340 Adaptive processing system having an array of individually configurable processing components 168 1988
 
FIFTH GENERATION COMPUTER CORP. (1)
4,860,201 Binary tree parallel processor 180 1986
 
FRANCE TELECOM (1)
5,465,375 Multiprocessor system with cascaded modules combining processors through a programmable logic cell array 84 1993
 
FREESCALE SEMICONDUCTOR, INC. (1)
5,561,738 Data processor for executing a fuzzy logic operation and method therefor 79 1994
 
HEWLETT-PACKARD COMPANY (1)
4,852,043 Daisy-chain bus system with truncation circuitry for failsoft bypass of defective sub-bus subsystem 64 1987
 
HTC CORPORATION (1)
6,219,833 Method of using primary and secondary processors 75 1998
 
HUDSON SOFT CO., LTD. (1)
5,530,873 Method and apparatus for processing interruption 63 1993
 
HUGHES ELECTRONICS CORPORATION (1)
5,901,279 Connection of spares between multiple programmable devices 52 1996
 
I-CUBE, INC. (1)
5,960,200 System to transition an enterprise to a distributed infrastructure 247 1996
 
INTERGRAPH HARDWARE TECHNOLOGIES COMPANY (1)
5,274,593 High speed redundant rows and columns for semiconductor memories 60 1990
 
INTERSIL CORPORATION (1)
4,498,172 System for polynomial division self-testing of digital networks 94 1982
 
ISCO, INC. (1)
5,125,801 Pumping system 74 1990
 
ITT CORPORATION (1)
4,852,048 Single instruction multiple data (SIMD) cellular array processing apparatus employing a common bus where a first number of bits manifest a first bus portion and a second number of bits manifest a second bus portion 99 1985
 
KABUSHIKI KAISHA TOSHIBA (1)
5,867,691 Synchronizing system between function blocks arranged in hierarchical structures and large scale integrated circuit using the same 78 1993
 
LOCKHEED MARTIN CORPORATION (1)
4,901,268 Multiple function data processor 81 1988
 
LSI LOGIC CORPORATION (1)
5,475,803 Method for 2-D affine transformation of images 127 1992
 
LUJACK SYSTEMS LLC (1)
5,065,308 Processing cell for fault tolerant arrays 65 1991
 
MENTOR GRAPHICS (HOLDING) LTD. (1)
5,754,827 Method and apparatus for performing fully visible tracing of an emulation 94 1995
 
MENTOR GRAPHICS CORPORATION (1)
5,649,176 Transition analysis and circuit resynthesis method and device for digital circuit modeling 126 1995
 
MICROPUMP, INC. (1)
5,865,239 Method for making herringbone gears 47 1997
 
MIRALFIN S.R.L. (1)
5,760,602 Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA 94 1996
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
5,047,924 Microcomputer 57 1988
 
MITSUBISHI ELECTRIC SEMICONDUCTOR SOFTWARE CO., LTD. (1)
5,657,330 Single-chip microprocessor with built-in self-testing function 68 1995
 
MORPHO TECHNOLOGIES (1)
2003/0123,579 Viterbi convolutional coding method and apparatus 55 2002
 
MOSAID TECHNOLOGIES INCORPORATED (1)
5,611,049 System for accessing distributed data cache channel at each network node to pass requests and data 240 1994
 
NANOWIRE LIMITED LIABILITY COMPANY (1)
6,092,174 Dynamically reconfigurable distributed integrated circuit processor and method 110 1998
 
NEC CORPORATION (1)
4,591,979 Data-flow-type digital processing apparatus 85 1983
 
PACT INFORMATIONSTECHNOLOGIE AG (1)
2004/0015,899 Method for processing data 56 2001
 
PARALLEL SIMULATION TECHNOLOGY, LLC (1)
5,418,952 Parallel processor cell computer system 91 1992
 
PIE DESIGNS SYSTEMS, INC. (1)
5,425,036 Method and apparatus for debugging reconfigurable emulation systems 229 1992
 
PRASENDT INVESTMENTS, LLC (1)
5,475,583 Programmable control system including a logic module and a method for programming 81 1992
 
PRINCETON GAMMA-TECH INSTRUMENTS, INC. (1)
5,349,193 Highly sensitive nuclear spectrometer apparatus and method 69 1993
 
PRINCETON UNIVERSITY (1)
5,442,790 Optimizing compiler for computers 159 1994
 
PRINCETON UNIVERSITY, NON-PROFIT ORGANIZATION (1)
4,811,214 Multinode reconfigurable pipeline computer 210 1986
 
SCIENCE & TECHNOLOGY CORPORATION @ UNM (1)
6,883,084 Reconfigurable data path processor 57 2002
 
SEASOUND, LLC (1)
5,361,373 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor 254 1992
 
SEFTA TRUSTEES LIMITED (1)
5,497,498 Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation 199 1993
 
SGS-THOMSON MICROELECTRONICS LIMITED (1)
5,473,267 Programmable logic device with memory that can store routing data of logic data 148 1995
 
SGS-THOMSON MICROELECTRONICS, INC. (1)
5,128,559 Logic block for programmable logic devices 169 1991
 
SHARP KABUSHIKI KAISHA (1)
5,115,510 Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information 79 1988
 
SIEMENS AKTIENGESELLSCHAFT (1)
5,043,978 Circuit arrangement for telecommunications exchanges 64 1989
 
SP TECHNOLOGY CORP., 1150 QUAIL LAKE LOOP, COLORADO SPRINGS, CO 80906 A CORP. OF DE (1)
5,303,172 Pipelined combination and vector signal processor 84 1988
 
SUMITOMO BANK OF NEW YORK TRUST COMPANY (1)
6,378,068 Suspend/resume capability for a protected mode microprocesser 150 1995
 
SUN MICROSYSTEMS, INC. (1)
6,286,134 Instruction selection in a multi-platform environment 74 1999
 
TAYLOR MADE GOLF COMPANY, INC. (1)
5,294,119 Vibration-damping device for a golf club 107 1992
 
THE JOHNS HOPKINS UNIVERSITY (1)
4,720,780 Memory-linked wavefront array processor 202 1985
 
THE UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF THE NATIONAL AERONAUTICS AND SPACE ADMINISTRATION (1)
5,548,773 Digital parallel processor array for optimum path planning 92 1993
 
THOMSON-CSF (1)
4,891,810 Reconfigurable computing device 90 1987
 
TM PATENTS, L.P. (1)
5,123,109 Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system 78 1990
 
U.S. PHILIPS CORPORATION (1)
5,659,797 Sparc RISC based computer system including a single chip processor with memory management and DMA units coupled to a DRAM interface 100 1992
 
UNIVERSITY OF HAWAII (1)
5,574,930 Computer system and method using functional memory 119 1994
 
UNIVERSITY OF KENTUCKY RESEARCH FOUNDATION (1)
6,202,182 Method and apparatus for testing field programmable gate arrays 89 1998
 
VERISITY DESIGN, INC. (1)
6,389,379 Converification system and method 121 1998
 
VERSITY DESIGN, INC. (1)
6,321,366 Timing-insensitive glitch-free logic system and method 103 1998
 
VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY (1)
5,828,858 Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) 130 1996
 
WALKER-ESTES CORPORATION (1)
5,301,284 Mixed-resolution, N-dimensional object space method and apparatus 87 1991
 
WAVETRACER, INC. (1)
5,193,202 Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor 78 1990
 
WOLFGANG LERCHE (1)
6,657,457 Data transfer on reconfigurable chip 50 2000
 
XEROX CORPORATION (1)
5,924,119 Consistent packet switched memory bus for shared memory multiprocessors 64 1994
 
OTHER [CHECK PATENT PROFILE FOR ASSIGNMENT INFORMATION] (4)
5,535,406 Virtual processor module including a reconfigurable programmable matrix 136 1993
5,838,165 High performance self modifying on-the-fly alterable logic FPGA, architecture and method 228 1996
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 2009
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 2009

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
RICHTER, THOMAS, MR. (24)
7,595,659 Logic cell array and bus system 27 2001
7,657,877 Method for processing data 25 2002
7,996,827 Method for the translation of programs for reconfigurable architectures 3 2002
7,577,822 Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization 9 2002
8,429,385 Device including a field having function cells and information providing cells controlled by the function cells 0 2002
8,281,108 Reconfigurable general purpose processor having time restricted configurations 0 2003
8,127,061 Bus systems and reconfiguration methods 0 2003
7,657,861 Method and device for processing data 3 2003
8,156,284 Data processing method and device 1 2003
7,565,525 Runtime configurable arithmetic and logic cell 19 2004
7,844,796 Data processing device and method 2 2004
8,301,872 Pipeline configuration protocol and configuration unit communication 0 2005
7,822,881 Process for automatic dynamic reloading of data flow processors (DFPs) and units with two- or three-dimensional programmable cell architectures (FPGAs, DPGAs, and the like) 2 2005
8,250,503 Hardware definition method including determining whether to implement a function as hardware or software 0 2007
8,156,312 Processor chip for reconfigurable data processing, for processing numeric and logic operations and including function and interconnection control units 0 2007
7,840,842 Method for debugging reconfigurable architectures 0 2007
7,650,448 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures 25 2008
7,602,214 Reconfigurable sequencer structure 0 2008
8,209,653 Router 0 2008
8,099,618 Methods and devices for treating and processing data 1 2008
8,145,881 Data processing device and method 1 2008
8,069,373 Method for debugging reconfigurable architectures 0 2009
7,822,968 Circuit having a multidimensional structure of configurable cells that include multi-bit-wide inputs and outputs 1 2009
8,058,899 Logic cell array and bus system 1 2009
 
NVIDIA CORPORATION (16)
7,594,229 Predictive resource allocation in computing systems 0 2001
7,644,279 Consumer product distribution in the embedded system market 1 2002
7,802,108 Secure storage of program code for an embedded system 0 2002
7,617,100 Method and system for providing an excitation-pattern based audio coding scheme 0 2003
7,620,678 Method and system for reducing the time-to-market concerns for embedded system design 1 2003
7,502,915 System and method using embedded microprocessor as a node in an adaptable computing machine 11 2003
7,624,204 Input/output controller node in an adaptable computing environment 0 2003
8,296,764 Internal synchronization control for adaptive integrated circuitry 0 2004
8,130,825 Processor for video data encoding/decoding 0 2005
8,018,463 Processor for video data 0 2005
7,979,860 Method for estimating cost when placing operations within a modulo scheduler when scheduling for processors with a large number of function units or reconfigurable data paths 0 2006
8,169,789 Graphics processing unit stiffening frame 0 2007
7,987,065 Automatic quality testing of multimedia rendering by software drivers 0 2007
7,948,500 Extrapolation of nonresident mipmap data using resident mipmap data 0 2007
7,944,453 Extrapolation texture filtering for nonresident mipmaps 1 2007
7,999,820 Methods and systems for reusing memory addresses in a graphics system 0 2007
 
ADAPTEC, INC. (1)
7,770,147 Automatic generators for verilog programming 0 2005
 
LATTIX, INC. (1)
7,512,929 Apparatus and method for managing design of a software system using dependency structure 1 2004
 
NATIONAL INSTRUMENTS CORPORATION (1)
8,423,977 Implementing a class oriented data flow program on a programmable hardware element 0 2009
 
PACT INFORMATIONSTECHNOLOGIE GMBH (1)
8,230,411 Method for interleaving a program over a plurality of cells 2000
 
PACTXPP TECHNOLOGIES AG (1)
7,581,076 Methods and devices for treating and/or processing data 1 2002
 
OTHER [CHECK PATENT PROFILE FOR ASSIGNMENT INFORMATION] (9)
7,782,087 Reconfigurable sequencer structure 0 2009
8,312,301 Methods and devices for treating and processing data 0 2009
8,281,265 Method and device for processing data 0 2009
7,899,962 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 0 2009
7,928,763 Multi-core processing system 0 2010
8,312,200 Processor chip including a plurality of cache elements connected to a plurality of processor cores 0 2010
8,195,856 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures 0 2010
8,310,274 Reconfigurable sequencer structure 0 2011
8,407,525 Method for debugging reconfigurable architectures 0 2011

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
7.5 Year Payment $3600.00 $1800.00 $900.00 Oct 24, 2014
11.5 Year Payment $7400.00 $3700.00 $1850.00 Oct 24, 2018
Fee Large entity fee small entity fee micro entity fee
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00