Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment
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United States of America Patent
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May 8, 2007
Grant Date -
Feb 27, 2003
app pub date -
Aug 5, 2002
filing date -
Aug 27, 2001
priority date (Note) -
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Abstract
Stored units of information related to packet processing are associated with identifiers, each of which is maintained as an entry in a Content Addressable Memory (CAM). Each entry includes status information associated with the information unit with which the identifier is associated. The status information is used to determine validity of the information unit with which the status information is associated.
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