Domino logic with variable threshold voltage keeper
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United States of America Patent
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May 15, 2007
Grant Date -
N/A
app pub date -
Jun 30, 2003
filing date -
Jun 28, 2002
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A variable threshold voltage keeper circuit technique is proposed for simultaneous power reduction and speed enhancement of domino logic circuits. The threshold voltage of the keeper transistor is dynamically modified during circuit operation to reduce the contention current without sacrificing noise immunity. The threshold voltage of the keeper transistor is controlled by a body bias generator which switches between two voltages in accordance with the clock signal.
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