Process for providing submodel performance in a computer processing unit
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United States of America Patent
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May 15, 2007
Grant Date -
Nov 3, 2005
app pub date -
Apr 30, 2004
filing date -
Apr 30, 2004
priority date (Note) -
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Abstract
A simple and accurate processor derating method includes: sampling a real-time counter/clock too obtain an initial time value T1; resetting an Icnt Counter; incrementing the Icnt Counter to reflect the processing of each instruction; comparing the count in the Icnt Counter to a predetermined count IcntMax and if the count in the Icnt Counter is at least IcntMax, then sampling the RTC to obtain a second time T2. T1 is then subtracted from T2 to obtain a time difference DT which is multiplied by ((1-1/DF)-1) to obtain a Degradation Delay DD period, DF being a constant having a value which is the desired submodel performance with respect to full performance. The Degradation Delay is instituted, the RTC is sampled from time to time to obtain a test third time T3. When a test T3 minus T2 is not less than DD, then T1 is set to T3. Then, the procedure is repeated for a next group of instructions. Optionally, further accuracy can be achieved by treating 'wait-type' and/or 'RTC-access-type' instructions specially and also by calculating a DDExtra period value which is used to adjust the next DD.
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