Process for wafer level treatment to reduce stiction and passivate micromachined surfaces and compounds used therefor
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United States of America Patent
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May 22, 2007
Grant Date -
Nov 13, 2003
app pub date -
Jun 9, 2003
filing date -
Feb 1, 2000
priority date (Note) -
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Abstract
This invention discloses a process for forming durable anti-stiction surfaces on micromachined structures while they are still in wafer form (i.e., before they are separated into discrete devices for assembly into packages). This process involves the vapor deposition of a material to create a low stiction surface. It also discloses chemicals which are effective in imparting an anti-stiction property to the chip. These include polyphenylsiloxanes, silanol terminated phenylsiloxanes and similar materials.
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