Power switch using a field-effect transistor (FET) pair
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United States of America Patent
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Jun 12, 2007
Grant Date -
N/A
app pub date -
Aug 29, 2005
filing date -
Mar 2, 2001
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A power switch, and a method, for use with a power switch having a field-effect transistor (FET) including source, drain and gate terminals. The power switch includes a first field-effect transistor (FET) having a first drain coupled to the drain terminal, a first source coupled to the source terminal, and a first gate; and, a second FET having a second drain coupled to the drain terminal, a second source coupled to the source terminal, and a second gate. The second FET has a gate length (L.sub.G) that is greater than or less than an L.sub.G of the first FET and has a length of a drain (L.sub.D) that is greater than or less than an L.sub.D of the first FET. The power switch further includes a control circuit coupled to the gate terminal, the first gate, and the second gate.
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