Method of manufacturing non-volatile DRAM

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United States of America Patent

PATENT NO 7232717
SERIAL NO

10447675

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Abstract

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A method of forming a non-volatile DRAM includes, in part: forming p-well and an n-well between two trench isolation regions formed in a semiconductor substrate, forming a polysilicon control gate of the non-volatile device disposed in the non-volatile DRAM, forming a first oxide spacer above portions of the body region and adjacent said first control gate, forming gate oxide layers of varying thicknesses above the body region, forming the guiding gate of the non-volatile device and the gate of an associated passgate transistor, forming LDD implant regions of the non-volatile device and the associated pass-gate transistor, forming source/drain regions of the non-volatile device and the associated pass-gate transistor, depositing a dielectric layer over the polysilicon guiding gate of the non-volatile device and the polysilicon gate of the associated passgate transistor, forming polysilicon landing pads, and forming polysilicon vertical walls defining capacitor plates of the non-volatile DRAM capacitor.

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Patent Owner(s)

Patent OwnerAddress
O2IC INC3910 FREEDOM CIRCLE SUITE 103 SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Kyu Hyun Cupertino, CA 36 465
Li, Sheau-suey Cupertino, CA 11 738

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