Instruction fetching system in a multithreaded processor utilizing cache miss predictions to fetch instructions from multiple hardware streams

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7237093
SERIAL NO

09595776

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Abstract

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In a multi-streaming processor having a memory cache, a system for fetching instructions from individual ones of multiple streams to an instruction pipeline is provided, comprising a fetch algorithm for selecting from which stream to fetch an instruction, and a hit/miss predictor for forecasting whether a load instruction will hit or miss the cache. The prediction by the hit-miss predictor is used by the fetch algorithm in determining from which stream to fetch. A hit prediction results in a next instruction being fetched from the same stream as the instruction tested by the hit/miss predictor, while a miss prediction results in the next instruction being fetched from a different stream, if any. The predictor is also used to determine which instructions to dispatch to functional units.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ARM FINANCE OVERSEAS LIMITEDCAMBRIDGE, GB266

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Musoll, Enric San Jose, CA 14 172
Nemirovsky, Mario Saragota, CA 48 806

Cited Art Landscape

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Patent Citation Ranking

Forward Cite Landscape

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