Multiprocessor system having a plurality of control programs stored in a continuous range of addresses of a common memory and having identification registers each corresponding to a processor and containing data used in deriving a starting address of a CPU-linked interrupt handler program to be executed by the corresponding processor
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United States of America Patent
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Jun 26, 2007
Grant Date -
Jul 31, 2003
app pub date -
Dec 27, 2002
filing date -
Dec 27, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
A multiprocessor system has a plurality of CPUs with respective local buses, and a memory which stores a plurality of programs to be executed by the CPUs and is connected to a common bus which can be accessed via the local buses, each local bus being connected to a CPU identification register which stores an identification value for identifying the corresponding CPU. When a program which is specific to a CPU is to be executed by that CPU, the corresponding identification value is read out from the identification register of the CPU and is judged, and branching to the appropriate program is performed based on the judgement result.
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