Methods for fabricating one or more metal damascene structures in a semiconductor wafer

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United States of America Patent

PATENT NO 7238614
APP PUB NO 20060099807A1
SERIAL NO

11270270

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Abstract

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Methods for fabricating one or more metal (e.g., copper) damascene structures in a semiconductor wafer use at least three polishing steps to reduce erosion topography in the resulting metal damascene structures and/or increase throughput. The polishing steps may be performed at four polishing units of a polishing apparatus, which may include one or more pivotable load/unload cups to transfer the semiconductor wafer between some of the polishing units.

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Patent Owner(s)

Patent OwnerAddress
HAM THOMAS H1811 SANTA RITA ROAD SUITE 130 PLEASANTON CA 94566

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jeong, In Kwon Cupertino, CA 37 337

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