Integration of ALD/CVD barriers with porous low k materials

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United States of America Patent

PATENT NO 7244683
APP PUB NO 20040256351A1
SERIAL NO

10741422

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Abstract

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A method for processing substrates is provided. The method includes depositing and etching a low k dielectric layer on a substrate, pre-cleaning the substrate with a plasma, and depositing a barrier layer on the substrate. Pre-cleaning the substrate minimizes the diffusion of the barrier layer into the low k dielectric layer and/or enhances the deposition of the barrier layer.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bekiaris, Nikolaos San Jose, CA 31 427
Chen, Ling Sunnyvale, CA 357 17312
Chung, Hua San Jose, CA 203 14401
Marcadal, Christophe Sunnyvale, CA 50 5903

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