Methods of making microelectronic packages including folded substrates

United States of America Patent

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Jul 24, 2007
Grant Date
Jun 17, 2004
app pub date
Sep 3, 2003
filing date
Sep 6, 2002

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Abstract

A microelectronic package is fabricated by a process which includes folding a substrate. A substrate is folded by engaging a folding portion of the substrate with a die so that the folding portion pivots with respect to a first portion of the substrate.

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Patent Owner	Address
TESSERA INC	3025 ORCHARD PARKWAY SAN JOSE CA 95134

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H05K:PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAIL....

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[Patents Count]

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Inventor Name	Address	# of filed Patents	Total Citations
Bang, Kyong-Mo	Sunnyvale, CA	28	669
Kang, Teck-Gyu	San Jose, CA	52	2627

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Methods of making microelectronic packages including folded substrates

Number of patents in Portfolio can not be more than 2000

United States of America Patent

10654375

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PATENT NO	7246431
APP PUB NO	20040115866A1
SERIAL NO	10654375
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
July 24, 2007	US,7246431,B2 US7246431B2	GRANTED PATENT AS SECOND PUBLICATION
June 17, 2004	US,20040115866,A1 US20040115866A1	FIRST PUBLISHED PATENT APPLICATION

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10654375

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