Input pipeline registers for a node in an adaptive computing engine

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United States of America Patent

PATENT NO 7249242
APP PUB NO 20040168044A1
SERIAL NO

10626479

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Abstract

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Input pipeline registers are provided at inputs to functional units and data paths in a adaptive computing machine. Input pipeline registers are used to hold last-accessed values and to immediately place commonly needed constant values, such as a zero or one, onto inputs and data lines. This approach can reduce the time to obtain data values and conserve power by avoiding slower and more complex memory or storage accesses. Another embodiment of the invention allows data values to be obtained earlier during pipelined execution of instructions. For example, in a three stage fetch-decode-execute type of reduced instruction set computer (RISC), a data value can be ready from a prior instruction at the decode or execute stage of a subsequent instruction.

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Patent Owner(s)

Patent OwnerAddress
NVIDIA CORPORATION2788 SAN TOMAS EXPRESSWAY SANTA CLARA CA 95051

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ramchandran, Amit San Jose, CA 22 381

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