Method and device for measuring resistance
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United States of America Patent
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-
Jul 31, 2007
Grant Date -
Nov 9, 2006
app pub date -
Mar 28, 2006
filing date -
Mar 30, 2005
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A device for measuring a resistance includes a comparator. A D-type flip-flop has its D input connected to the output of the comparator and its latch input connected for receiving a pulse signal at a fixed pulse repetition rate. A reference voltage source is connected to a first of the inputs of the comparator and an integrator is coupled between an output of the flip-flop and the second of the two inputs of the comparator. The integrator includes a resistor whereby the integrator develops a voltage at the second input of the comparator that depends on the pulse repetition rate and on the resistance of the resistor. The comparator, the integrator and the flip-flop are connected in a negative feedback loop such that at steady state the voltage developed by the integrator at the second input of the comparator is substantially equal to the reference voltage.
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