Content addressable memory with error signaling
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United States of America Patent
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Aug 14, 2007
Grant Date -
N/A
app pub date -
Aug 11, 2003
filing date -
Aug 3, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A content addressable memory (CAM) device including a CAM array, encoding circuit, address circuit and error checking circuit. The encoding circuit generates an address value that corresponds to one of a plurality of match lines included within the CAM array. The address circuit receives the address value from the encoding circuit and enables a data word to be output from a CAM array storage location indicated by the address value. The error checking circuit receives the data word output from the storage location and determines whether the data word contains an error.
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