Logic multiprocessor for FPGA implementation
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United States of America Patent
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Aug 21, 2007
Grant Date -
Jun 24, 2004
app pub date -
Sep 23, 2003
filing date -
Dec 20, 2002
priority date (Note) -
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Abstract
A design verification system utilizing programmable logic devices having varying numbers of logic processors, macro processors, memory processors and general purpose processors programmed therein is disclosed. These various processors can execute Boolean functions, macro operations, memory operations, and other computer instructions. This avoids either the need to implement logic or the need to compile the design into many gate-level Boolean logic operations for logic processors. Improved efficiency in the form of lower cost, lower power and/or higher speeds are the result when verifying certain types of designs.
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