Flip-chip semiconductor package with lead frame as chip carrier and fabrication method thereof
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United States of America Patent
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Sep 25, 2007
Grant Date -
Dec 18, 2003
app pub date -
Jul 16, 2002
filing date -
Jun 14, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A flip-ship semiconductor package with a lead frame as a chip carrier is provided, wherein a plurality of leads of the lead frame are each formed with at least a dam member thereon. When a chip is mounted on the lead frame by means of solder bumps, each of the solder bumps is attached to the corresponding one of the leads at a position between the dam member and an inner end of the lead. During a reflow-soldering process for wetting the solder bumps to the leads, the dam members would help control collapse height of the solder bumps, so as to enhance resistance of the solder bumps to thermal stress generated by CTE (coefficient of thermal expansion) mismatch between the chip and the leads, thereby preventing incomplete electrical connection between the chip and the leads.
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