Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus
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United States of America Patent
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Sep 25, 2007
Grant Date -
Dec 21, 2006
app pub date -
Aug 14, 2006
filing date -
Jun 25, 2002
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A bus architecture includes master devices that are each capable of initiating a data transfer procedure by generating a bus request signal. Each of the master devices is arranged to transmit an address signal to an address input of a multiplexer, to transmit a data signal to a data input of the multiplexer, and to transmit a control signal to a control input of the multiplexer. The control signals may include burst type control signals. The multiplexer is capable of selectively coupling a selected master device chosen from the group consisting of the master devices to a bus. The bus architecture further includes an arbiter arranged to receive the bus request signals as first inputs and arranged to receive the burst type control signals as second inputs, where the burst type control signals are received from an ingress side of the multiplexer.
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