Hierarchical scheduler inter-layer eligibility deferral

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United States of America Patent

PATENT NO 7277448
SERIAL NO

10608795

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Conventional schedulers propagate entries by either polling until an entry is ready, or alternatively, by attaching a so-called 'readiness time' to entries. A scheduler which recognizes the readiness time avoids consuming a parent schedule with polling, or with burdening entries with a future readiness time. The system of the present invention employs a deferral queue for deferring entries in response to pop requests from a parent schedule. The child schedule defers entries via the deferral queue when it is not ready to push an entry to the parent schedule, and sets the readiness time corresponding to the entry. Upon the expiration of the readiness time, the child schedule redetermines whether to push the deferred entry corresponding to the deferral queue or optionally to push an interim entry having since arrived. Accordingly, a child schedule receiving a pop requests retains the ability to push an entry at an earlier or later readiness time, and further retains the ability to reconsider which entry to push.

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Patent Owner(s)

  • CISCO TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kappler, Christopher J Waltham, MA 19 658
Long, Andrew A Northborough, MA 4 101
Olsen, Robert T Dublin, CA 5 98

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