Port structure in semiconductor processing system
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United States of America Patent
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Oct 9, 2007
Grant Date -
May 19, 2005
app pub date -
Feb 17, 2003
filing date -
Feb 22, 2002
priority date (Note) -
Expired
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Abstract
In a port structure 16A in a semiconductor processing system 2, a door 20A is disposed in a port 12A defined by upright wall 52 and 54. A table 48 opposed to the port is disposed outside the system. Defined on the table is a mount region 76 for mounting an open type cassette 18A for a process subject substrate W. A hood 50 is disposed rotatable relative to the table. The hood defines in its closed position a closed space surrounding the mount region and port, the space having a size to receive the cassette. First ventholes 58 are formed in the upright walls and/or the door so as to introduce gas from within the system into the closed space in the hood. Second ventholes 72 are formed in the table so as to discharge the gas can be discharged out of the closed space.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- TOKYO ELECTRON LIMITED
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Saeki, Hiroaki | Yamanashi, JP | 72 | 3748 |
Sasaki, Yoshiaki | Yamanashi, JP | 23 | 720 |
Takizawa, Hiroshi | Aichi, JP | 47 | 712 |
Taniyama, Yasushi | Aichi, JP | 28 | 476 |
Yoshida, Tetsuo | Yamanashi, JP | 132 | 1361 |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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