CONFIGURABLE IC'S WITH LOGIC RESOURCES WITH OFFSET CONNECTIONS
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United States of America Patent
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Oct 16, 2007
Grant Date -
Oct 18, 2007
app pub date -
Mar 15, 2005
filing date -
Nov 8, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
A configurable integrated circuit (“IC”) that includes several configurable tiles arranged in a tile arrangement. Each configurable tile has a set of configurable logic circuits and a set of configurable routing circuits for routing signals between configurable logic circuits. In some embodiments, at least a first logic circuit of a first tile has at least one direct connection with a second circuit of a second tile that does not neighbor the first tile and that is not aligned horizontally or vertically with the first tile in the tile arrangement.
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