Content addressable memory with selective error logging
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United States of America Patent
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Oct 16, 2007
Grant Date -
N/A
app pub date -
May 25, 2005
filing date -
Aug 3, 2001
priority date (Note) -
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Abstract
A content addressable memory (CAM) device with selective error logging. The CAM device includes a CAM array and an error detection circuit coupled to receive a data value from a selected storage location within the CAM array, the error detection circuit being adapted to generate an error indication according to whether the data value includes an error. An error storage circuit is coupled to receive the error indication from the error detection circuit and is adapted to store an error address that corresponds to the selected storage location if the error indication indicates that the data value includes an error and if the error address is not already stored within the error storage circuit.
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