Pattern generation on a semiconductor surface

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United States of America Patent

PATENT NO 7290242
APP PUB NO 20050172249A1
SERIAL NO

11091056

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Abstract

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A method of forming a pattern of elements is shown. In one embodiment, the method is used to create a reticle. In another embodiment, the method is used to further form a number of elements on a surface of a semiconductor wafer. A pattern on a reticle is first generated using a medium such as computer software to interconnect a number of active areas on the wafer. The pattern is then modified according to a number of rules to create a pattern where substantially all spaces between planned elements exhibit a desired gap width. Layers of elements such as trace lines can be better covered with an ILD in a simplified deposition process as a result of the novel pattern formation described herein.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INCIDAHO IDAHO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Juengling, Werner Boise, ID 254 4667

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