Method and apparatus for buffering bi-directional open drain signal lines

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United States of America Patent

PATENT NO 7292067
APP PUB NO 20060267632A1
SERIAL NO

11128424

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A buffer system includes a logic adjusting circuit for translating a first logic level of a first component to a second logic level of a second component. The first and second logic level values are substantially different, and the buffer system has no directional control signal. A method of interfacing at least two components with different logic voltage requirements on a single bus without a separate directional control signal includes initializing a buffering circuit, activating the buffering circuit, transferring data through the buffering circuit, and deactivating the buffering circuit. A method of implementing a bi-directional interface between at least two devices interfaced on a bus includes providing a plurality of logic components interconnected to transfer data through the bus, and transferring data through the bus from a first device to a second device. The direction of data transfer is determined without a separate directional control signal.

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Patent Owner(s)

Patent OwnerAddress
EXELIS INC1650 TYSONS BLVD SUITE 1700 MCLEAN VA 22102

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Schwarz, Daniel J Fort Wayne, IN 4 31

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