Apparatus and method of ordering state transition rules for memory efficient, programmable, pattern matching finite state machine hardware

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United States of America Patent

PATENT NO 7301792
APP PUB NO 20060221658A1
SERIAL NO

11422529

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Abstract

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A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barrie, Robert Matthew Double Bay, AU 22 743
de, Jong Nicholas Bondi Junction, AU 5 94
Gould, Stephen Killara, AU 43 850
Williams, Darren Newtown, AU 27 739

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