Method of forming a multi-layer semiconductor structure incorporating a processing handle member
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United States of America Patent
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Dec 11, 2007
Grant Date -
Nov 4, 2004
app pub date -
Dec 30, 2003
filing date -
Dec 31, 2002
priority date (Note) -
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Abstract
A method of forming a multi-layer semiconductor structure includes attaching a handle-member to a top surface of a first structure using a first interface. At least one region of a bottom surface of the first structure is etched to form at least a first via-hole for exposing a portion of a first conductive member defined on the first structure. A conductive material is disposed in the first via-hole such that a first end of the conductive material is in electrical communication with the first conductive member and a second end of the conductive material is exposed at the bottom surface of the first structure. A second interface is disposed over at least the second end of the conductive material, which serves as a bonding and/or electrical interface between the first conductive member defined on the first structure and a second structure of the multi-layer semiconductor device structure.
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