Multi-port communications integrated circuit and method for facilitating communication between a central processing chipset and multiple communication ports
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United States of America Patent
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Dec 11, 2007
Grant Date -
N/A
app pub date -
Aug 18, 2006
filing date -
Nov 16, 2001
priority date (Note) -
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Abstract
A system includes a core chipset that is configured to communicate with a central processing unit. The system includes a memory bridge configured to communicate with memory. An accelerated graphics processor configured to communicate with a graphics device. An input/output bridge communicates with the memory bridge and the accelerated graphics processor and includes a bus controller. A Peripheral Component Interconnect-Extended (PCI-X) bus communicates with the bus controller. An integrated circuit includes a bus interface that communicates with the PCI-X bus. An Ethernet controller communicates with the bus interface. A serial advanced technology attachment (ATA) host adapter communicates with the bus interface and is configured to control a mass data storage unit.
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