Interface layer for the fabrication of electronic devices

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United States of America Patent

PATENT NO 7315068
APP PUB NO 20050164480A1
SERIAL NO

11077240

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Abstract

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The present invention is directed to methods for making electronic devices with a thin anisotropic conducting layer interface layer formed between a substrate and an active device layer that is preferably patterned conductive layer. The interface layer preferably provides Ohmic and/or rectifying contact between the active device layer and the substrate and preferably provides good adhesion of the active device layer to the substrate. The active device layer is preferably fashioned from a nanoparticle ink solution that is patterned using embossing methods or other suitable printing and/or imaging methods. The active device layer is preferably patterned into an array of gate structures suitable for the fabrication of thin film transistors and the like.

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Patent Owner(s)

Patent OwnerAddress
KOVIO INC3696 HAVEN AVENUE SUITE C REDWOOD CITY CA 94063

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dunphy, James C San Jose, CA 29 897
Gudeman, Chris Los Gatos, CA 9 214
Haubrich, Scott Castro Valley, CA 23 681
Kunze, Klaus Half Moon Bay, CA 136 4412
Rockenberger, Joerg Redwood City, CA 66 1294
Sleiman, Nassrin Sunnyvale, CA 5 135
Spindt, Chris Menlo Park, CA 5 265
Takashima, Mao Mountain View, CA 18 370
Zurcher, Fabio Brisbane, CA 34 737

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