Liquid crystal display wiring pattern having gate lines and storage electrode lines
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United States of America Patent
Stats
-
Jan 8, 2008
Grant Date -
Dec 30, 2004
app pub date -
Jul 19, 2004
filing date -
Jun 1, 1993
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A liquid crystal display comprises a first wiring pattern formed on a substrate. The first wiring pattern comprises a gate line, a gate electrode and a storage electrode line. A first insulating layer is formed on the first wiring pattern. A semiconductor pattern is formed on the first insulating layer. A second wiring pattern is formed on the semiconductor pattern and the first insulating layer. The second wiring pattern comprises a data line, a source electrode and a drain electrode. The drain electrode at least partially overlaps the storage electrode line. A second insulating layer is formed on the second wiring pattern. The second insulating layer has an opening exposing the drain electrode. A pixel electrode is formed on the second insulating layer and connected to the drain electrode via the opening. The storage electrode line has a branch extending parallel to the data line. The pixel electrode overlaps the gate line of the previous row.
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