Bitline shielding for thyristor-based memory
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United States of America Patent
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Jan 15, 2008
Grant Date -
N/A
app pub date -
Jul 5, 2005
filing date -
Jul 5, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Method and apparatus for writing and reading information to and from a memory cell. For a read, a write path is used to electrically shield at least one adjacent bitline from a bitline associated with the memory cell to be read, and the memory cell is read while the at least one adjacent bitline is electrically shielded from the bitline associated with the memory cell being read. For a write, the write path is used to electrically shield at the least one adjacent bitline from a bitline associated with a memory cell to be written to; memory cells coupled to a wordline are read and buffered; and the memory cell is written to while the at least one adjacent bitline is electrically shielded from the writing to the memory cell.
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