Delay locked loop with frequency control
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United States of America Patent
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Jan 15, 2008
Grant Date -
Nov 20, 2003
app pub date -
May 16, 2002
filing date -
May 16, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A delay locked loop includes a delay line for delaying an input signal generated from an external signal. A delay controller controls the delay line to keep the external and internal signals synchronized. The delay locked loop also includes cycle control circuitry for controlling the cycle time of the signal entering the delay and the cycle time of the signal exiting the delay line.
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