US Patent No: 7,320,930

Number of patents in Portfolio can not be more than 2000

Multi-elevation singulation of device laminates in wafer scale and substrate processing

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ALSO PUBLISHED AS: 20050233549
ATTORNEY / AGENT: (SPONSORED)
 

Importance

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Abstract

Wafer scale and substrate processing device singulation methods, and devices made by the methods, for singulation of discrete devices from a processed wafer or laminated structures, involves formation of separation scribes or saw cuts at multiple elevations in intersecting scribe streets or lines so that a separation cut in one direction is at a different depth than a separation cut in a different and intersecting direction. Separation or fracture of the wafer or laminated structure along one of the separation cuts does not transfer to the separation line of the intersecting separation cut due to the difference in depth of the intersecting cuts or scribes, and due to the difference in elevation of the bottom surfaces of the cuts or scribes within the scribe streets, resulting in cleaner edges on the separated devices.

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First Claim

Related Publications

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Patent Owner(s)

Patent OwnerAddressTotal Patents
HANA MICRODISPLAY TECHNOLOGIES, INC.TWINSBURG, OH3

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Eshleman, Dean Streetsboro, OH 3 3

Cited Art

Patent Info (Count) # Cites Year
 
CONEXANT SYSTEMS, INC. (1)
2002/0114,507 Saw alignment technique for array device singulation 3 2001
 
FormFactor, Inc. (1)
5,832,601 Method of making temporary connections between electronic components 188 1997
 
FREESCALE SEMICONDUCTOR, INC. (1)
6,150,240 Method and apparatus for singulating semiconductor devices 21 1998
 
MICRON TECHNOLOGY, INC. (1)
5,059,899 Semiconductor dies and wafers and methods for making 164 1990
 
REGENMACHER LTD. (1)
5,963,289 Asymmetrical scribe and separation method of manufacturing liquid crystal devices on silicon wafers 49 1997
 
SUMITOMO MITSUBISHI SILICON CORPORATION (1)
6,568,384 Semiconductor material cutting and processing method 8 2000
 
TOKYO SEIMITSU CO., LTD. (1)
6,422,227 Dicing apparatus, kerf inspecting method and kerf inspecting system 7 2000

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (1)
8,361,604 Methods and systems for releasably attaching support members to microfeature workpieces 0 2010
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (1)
7,642,631 Packaged semiconductor chip comprising an integrated circuit chip ablated with laser and cut with saw blade from wafer 0 2007

Maintenance Fees

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7.5 Year Payment $3600.00 $1800.00 $900.00 Jul 22, 2015
11.5 Year Payment $7400.00 $3700.00 $1850.00 Jul 22, 2019
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Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00