Method of manufacturing a phase change RAM device utilizing reduced phase change current
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United States of America Patent
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Feb 19, 2008
Grant Date -
Dec 14, 2006
app pub date -
Oct 20, 2005
filing date -
Jun 10, 2005
priority date (Note) -
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Abstract
To effectively lower the current required for changing a phase of a phase change layer in a phase change RAM device, metal pads are formed on a semiconductor substrate, and an oxide layer is formed on the metal pads. Nano-sized copolymer patterns aligned with the metal pads covered by the oxide layer are formed on the oxide layer. The oxide layer is etched to form oxide layer patterns by using the nano-sized copolymer patterns as barrier. The nano-sized copolymer patterns are then removed. A nitride layer is deposited and then etched to expose the oxide layer patterns. The exposed oxide layer patterns are removed to form nano-sized holes exposing the metal pads. Bottom electrodes are then formed in the nano-sized holes. A phase change layer and a top electrode are formed on each of the bottom electrodes.
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