Heterogeneously integrated microsystem-on-a-chip
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United States of America Patent
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Feb 26, 2008
Grant Date -
Jul 12, 2007
app pub date -
Nov 13, 2003
filing date -
Nov 13, 2003
priority date (Note) -
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Abstract
A microsystem-on-a-chip comprises a bottom wafer of normal thickness and a series of thinned wafers can be stacked on the bottom wafer, glued and electrically interconnected. The interconnection layer comprises a compliant dielectric material, an interconnect structure, and can include embedded passives. The stacked wafer technology provides a heterogeneously integrated, ultra-miniaturized, higher performing, robust and cost-effective microsystem package. The highly integrated microsystem package, comprising electronics, sensors, optics, and MEMS, can be miniaturized both in volume and footprint to the size of a bottle-cap or less.
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