Plasma display

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United States of America Patent

PATENT NO 7339553
APP PUB NO 20040251830A1
SERIAL NO

10480324

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Abstract

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A plasma display panel with a drive circuit that divides a field into a plurality of sub-fields with each sub-field including a write period, a discharge sustain period and an erase period. In the discharge sustain period at least one of a plurality of pulses applied in a later part of the discharge sustain period has a larger pulse width than a pulse applied in an earlier part of the discharge sustain period and in the erase period, a narrow pulse is applied to a pair of electrodes extending across each of a plurality of discharge cells. The narrow pulse has a pulse height lower than a discharge firing voltage of the plurality of discharge cells and a smaller pulse width than the pulses applied in the discharge sustain period.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTDOSAKA JAPAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ando, Toru Osaka, JP 68 199
Nagao, Nobuaki Katano, JP 85 667
Nishimura, Masaki Takatsuki, JP 77 368
Takada, Yusuke Katano, JP 15 182

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