Process of fabricating a semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7351619
SERIAL NO

10831617

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed.In an n-channel type TFT 302, an Lov region 207 is disposed, whereby a TFT structure highly resistant to hot carriers is realized. Further, in an n-channel type TFT 304 forming a pixel portion, Loff regions 217 to 220 are disposed, whereby a TFT structure having a low OFF-current value is realized. In this case, in the Lov region, the n-type impurity element exists at a concentration higher than that of the Loff regions, and the whole of the n-type impurity region (b) which constitutes the Lov region is sufficiently activated by optical annealing, so that a good junction portion is formed between the n-type impurity region and the channel forming region.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTD398 HASE ATSUGI-SHI KANAGAWA 2430036 ?2430036

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kitakado, Hidehito Kakogawa, JP 89 2829
Koyama, Jun Sagamihara, JP 1634 57063
Yamazaki, Shunpei Setagaya, JP 7534 239327

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation