An apparatus and method for sharing a functional unit. In one embodiment, a processor may include instruction fetch logic configured to issue instructions, and a first functional unit configured to execute instructions issued from the instruction fetch logic and to execute operations issued from a second functional unit, where the operations are issued asynchronously with respect to the instructions. The second functional unit may be configured to provide one or more operands corresponding to a given operation to the first functional unit. The first functional unit may include temporary result storage configured to store a result of the given operation while the first functional unit executes a given instruction issued from the instruction fetch logic, and the first functional unit may be further configured to use the stored result as an operand of an operation issued subsequently to the given operation.
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