Flow definition language for designing integrated circuit implementation flows
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United States of America Patent
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Apr 1, 2008
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app pub date -
May 27, 2004
filing date -
May 27, 2004
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Abstract
An instance of a flow definition language for designing an integrated circuit implementation flow. The instance of the flow definition language includes a hierarchical collection of stages for a physical chip design. Relational constraints define the execution order of a plurality of tasks in the hierarchical collection of stages. Parameters customize the plurality of tasks. The relational constraints and parameters are hierarchically defined, such that higher order definitions in the hierarchical collection of stages override lower level definitions of the relational constraints and parameterized knobs.
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