Testing method and testing apparatus

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United States of America Patent

PATENT NO 7358714
APP PUB NO 20070091698A1
SERIAL NO

11334399

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Abstract

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A testing method of a semiconductor integrated circuit device includes a testing step of conducting a functional test by supplying test pattern data to a semiconductor integrated circuit device mounted upon a testing apparatus, and a post processing step conducted after the testing step for continuously driving the semiconductor integrated circuit device by supplying dummy test pattern to the semiconductor integrated circuit device, wherein the test pattern data is supplied with a first system clock speed while the dummy test pattern data is supplied with a second, slower system clock speed, the post processing step switching a system clock speed of the testing apparatus from the first system clock speed to the second system clock speed at the same time as finishing of the testing step.

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Patent Owner(s)

Patent OwnerAddress
SOCIONEXT INC2-10-23 SHIN-YOKOHAMA KOHOKU-KU YOKOHAMA-SHI KANAGAWA 2220033 ?2220033

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishihara, Shigenobu Kawasaki, JP 7 115
Watanabe, Takao Kawasaki, JP 217 4517

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