Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 15, 2008
Grant Date -
N/A
app pub date -
Jan 21, 2005
filing date -
Jan 21, 2005
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Logic design apparatus and method provides serial multiplexer chains in a programmable logic fabric, each element in the chain either selects output of block, or passes output from earlier element of the chain. Select line is a decoder structure or output from configurable function generator that is configured at power-on to create correct selection. Using such structure, larger multiplexer, including priority multiplexers, tristate buses or larger look-up tables (LUTs) can be created. These novel structures can implement priority, non-priority or tristate multiplexers.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully