Method for changing a thread priority in a simultaneous multithread processor
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United States of America Patent
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Apr 22, 2008
Grant Date -
Oct 28, 2004
app pub date -
Apr 24, 2003
filing date -
Apr 24, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
An SMT system is designed to allow software alteration of thread priority. In one case, the system signals a change in a thread priority based on the state of instruction execution and in particular when the instruction has completed execution. To alter the priority of a thread, the software uses a special form of a 'no operation' (NOP) instruction (hereafter termed thread priority NOP). When the thread priority NOP is dispatched, its special NOP is decoded in the decode unit of the IDU into an operation that writes a special code into the completion table for the thread priority NOP. A 'trouble' bit is also set in the completion table that indicates which instruction group contains the thread priority NOP. The trouble bit indicates that special processing is required after instruction completion. The thread priority instruction is processed after completion using the special code to change a thread's priority.
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