Partitioning a large design across multiple devices
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United States of America Patent
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May 6, 2008
Grant Date -
N/A
app pub date -
Apr 5, 2005
filing date -
Mar 3, 2004
priority date (Note) -
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Abstract
A method of partitioning a design across a plurality of integrated circuits can include creating a software construct for each one of the plurality of integrated circuits and assigning a plurality of instances to a selected software construct. Each of the plurality of instances can be from a different logic hierarchy. The method further can include automatically adding at least one input/output buffer and port to the selected software construct to accommodate the plurality of instances and creating nets connecting the plurality of instances and the at least one input/output buffer and port within the selected software construct.
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