Device having improved surface planarity prior to MRAM bit material deposition
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United States of America Patent
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May 20, 2008
Grant Date -
Jul 1, 2004
app pub date -
Dec 15, 2003
filing date -
Dec 20, 2001
priority date (Note) -
In Force
status (Latency Note)
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Abstract
The present invention provides a method of fabricating a portion of a memory cell, the method comprising providing a first conductor in a trench which is provided in an insulating layer and flattening an upper surface of the insulating layer and the first conductor, forming a material layer over the flattened upper surface of the insulating layer and the first conductor and flattening an upper portion of the material layer while leaving intact a lower portion of the material layer over the insulating layer and the first conductor.
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