Semiconductor device and method for manufacturing the same
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United States of America Patent
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-
Jun 3, 2008
Grant Date -
Jun 30, 2005
app pub date -
Feb 25, 2005
filing date -
Sep 20, 1993
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.
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