Methods for self-aligned trench filling with grown dielectric for high coupling ratio in semiconductor devices

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United States of America Patent

PATENT NO 7381615
APP PUB NO 20060110880A1
SERIAL NO

10996030

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Abstract

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Methods for self-aligned trench filling to isolate active regions in high-density integrated circuits are provided. A deep, narrow trench is etched into a substrate between active regions. The trench is filled by growing a suitable dielectric such as silicon dioxide. The oxide grows from the substrate to fill the trench and into the substrate to provide an oxide of greater width and depth than the trench. A conductive layer used for the charge storage region of memory cells can be formed prior to formation of the trench isolation region. The trench can be etched after or as part of etching to form the individual charge storage regions. This can ensure alignment of active areas between isolation trenches. Because the dielectric growth process is self-limiting, an open area resulting from the etching process can be maintained between the active areas. A subsequently formed inter-gate dielectric layer and control gate layer can fill the open area to provide sidewall coupling between control gates and floating gates.

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Patent Owner(s)

Patent OwnerAddress
SANDISK TECHNOLOGIES INC951 SANDISK DRIVE MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yuan, Jack H Cupertino, CA 54 4464

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