Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit

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United States of America Patent

PATENT NO 7386656
APP PUB NO 20080025125A1
SERIAL NO

11524812

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Abstract

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A memory circuit power management system and method are provided. An interface circuit is in communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to perform a power management operation in association with only a portion of the memory circuits

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  • GOOGLE LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rajan, Suresh Natarajan San Jose, CA 80 11404
Schakel, Keith R San Jose, CA 64 9577
Smith, Michael John Sebastian Palo Alto, CA 78 10792
Wang, David T San Jose, CA 96 11807
Weber, Frederick Daniel San Jose, CA 55 9112

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