Logic analyzer data processing method
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United States of America Patent
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Jun 24, 2008
Grant Date -
Jun 29, 2006
app pub date -
Oct 21, 2002
filing date -
Oct 21, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A logic analyzer data processing method used in a logic analyzer having a control circuit adapted to read in test data from a test sample, a memory controlled by the control circuit to store the test data received from the test sample, and a display adapted to display the test data fetched by the control circuit from the memory, the method including the step of enabling the control circuit to drive a compressor to compress the test data received form the test sample before storing it in the memory, and to decompress the compressed test data before transmitting it from the memory to the display.
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