Method and system for DMA optimization in host bus adapters

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United States of America Patent

PATENT NO 7398335
SERIAL NO

10994829

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Abstract

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Method and system for optimizing DMA request processing is provided. The system includes a HBA that uses a dynamic DMA maximum write burst count sizing to optimize processing of write and read requests, wherein the HBA includes a DMA optimizer module that selects a certain write burst size to adjust performance when read and write DMA requests are being utilized. The DMA optimizer module can toggle between write and read request priority based on a maximum write request burst size. A shorter maximum write burst size provides more opportunity to issue read requests and a larger maximum burst size provides a better write request performance. The method includes, evaluating a read request throughput rate; evaluating a write request throughput rate; evaluating a read request utilization rate; evaluating a write request utilization rate; and adjusting a maximum write burst size.

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Patent Owner(s)

Patent OwnerAddress
MARVELL ASIA PTE LTDSINGAPORE SINGAPORE CITY SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chu, Kuangfu D Irvine, CA 4 224
Gandhi, Rajendra R Laguna Niguel, CA 15 301
Sonksen, Bradley S Margarita, CA 12 202

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